In displaying an image signal on a display device, such as a liquid crystal television, there are cases where: (1) the image signal is displayed in a SYNC mode (synchronizing mode); (2) the image signal is displayed in a SYNC-DE mode; and (3) the image signal is displayed in a DE mode (data enable mode).
In the case where the image signal is displayed in the SYNC mode (synchronizing mode), on the display device, the image signal (image data) is displayed by using a vertical synchronizing signal, a horizontal synchronizing signal, and a main clock signal. Further, in the case where the image signal is displayed in the SYNC-DE mode, on the display device, the image signal (image data) is displayed by using a vertical synchronizing signal, a horizontal synchronizing signal, a data enable signal, and a main clock signal.
Whereas, in the case where the image signal is displayed in the DE mode, on the display device, the image signal (image data) is displayed by using a data enable signal and a main clock signal without using a vertical synchronizing signal and a horizontal synchronizing signal.
In the DE mode, since the vertical synchronizing signal does not exist, there is a case where the number of a line to which inputted image data belongs among the lines in one frame cannot be grasped, and as a result, image processing in a vertical direction cannot suitably be performed.
For example, with the art disclosed in Patent Document 1 (JP4040712B), in the DE mode, a pre-charge start vertical (STV) signal is generated at a predetermined timing based on a blanking period of the data enable signal. Further, with the art disclosed in Patent Document 1, a gate in a display panel is turned on in response to the generated pre-charge STV signal, before receiving a main STV signal indicating a timing at which actual data (image data) is inputted. Thus, with the art disclosed in Patent Document 1, a driving speed of the gate can be increased. In other words, with the art of Patent Document 1, in the DE mode in which the vertical synchronizing signal does not exist, a timing which is originally determined based on the vertical synchronizing signal can be grasped by using a signal (pre-charge STV signal) generated based on the data enable signal.